1. Field of the Invention
The present invention relates to low-stress substrate wafers with a low-defect, active surface, a method for making them and their uses. It also relates to electronic components, such as LEDs, transistors and chips made with them.
2. Related Art
Electronic and electro-optic semiconductor elements, such as lasers, high-speed transistors, LDs, LEDs and other complex components usually comprise a thin carrier or wafer substrate, especially on which functional layers are arranged over each other in a terrace-like manner. Functional layers of this sort are usually semiconductor or also insulating or balancing layers. To make this sort of component usually wafers are sawed off a block, cylinder and/or rod of a respective substrate and subsequently ground, lapped and polished, in order to obtain as planar and as smooth a surface as possible, which has a maximum elasticity and planarity and a minimum surface roughness. The grinding and polishing of the wafer is normally performed by a method in which the wafer substrate is fixed in a holder, which preferably rotates about its longitudinal axis and alternates its rotational direction, i.e. oscillates. The wafer substrate is pressed on a rotating grinding or polishing plate, which is equipped with a polishing pad, which similarly alternates its rotational direction. In this way the substrate surface to be coated is ground or eroded as smoothly as possible and smoothed so that a good to very good surface may be obtained. After that the functional layers are applied to the solid usually very thin substrate wafer.
One possibility for application of layers of this sort is the so-called epitaxy, especially metal-organic gas phase epitaxy (MOCVD=metal organic chemical vapor deposition or also MOCVPE=metal organic chemical vapor phase epitaxy). In this sort of method the semiconductor layers are deposited on each other on the heated substrate from reactive gaseous starting materials. The substrate and/or wafer are exposed to high temperatures, which lead to distortion and warping of the thin layers or platelets, so that non-uniform coatings are possible in the worst cases.
Moreover it has been shown that deposition of semiconductor layers on the wafer is a very temperature sensitive process and especially small temperature differences of 1° C. can lead to wavelength shifts of about 1 nm during manufacture of LEDs.
Furthermore it has been shown that defects in the surfaces themselves, faults in the crystal structure, impurities or even deviations of the surfaces from planarity can lead to defect sites in the layer structure, which impair the desired electrical insulating and/or electro-optic functions of the layer. A single observable defect of this sort, which suggests the existence of structural crystallographic defects, is called a “pit”. Interference microscopy (e.g. by means of a Leica Interference microscope, 160-power (16×10) magnification, resolution max 0.8 μm) is a suitable method for detection of this type of defect.